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  • Aniket Adak

Semiconductor Lithography - Technology Overview

What is Semiconductor Lithography?

Semiconductor lithography or photolithography is a fabrication process that transitions from highly complex circuit patterns drawn on a photomask made of a large glass plate to a reduced version of ultra-high-performance lenses and exposed onto a silicon substrate which is usually known as a wafer. In lucid words or lament terms, fabrication of an integrated circuit (IC) requires an amalgamation of physical and chemical processes performed on a semiconductor (e.g., silicon) substrate. In process classification, the various processes are segregated into: film deposition, patterning, and semiconductor doping. Films of both conductors, which are polysilicon, aluminum and with the help of more recently copper and insulators which are bifurcated as various forms of silicon dioxide, silicon nitride, and others are used to connect and beset transistors and their components. Selective doping of various regions of silicon permits the conductivity of the silicon wafer to be changed with the application of voltage. With the creation of structures or models of these varied components, millions of transistors can be constructed and wired together to form the complex circuitry of a modern microelectronic device. Fundamental to all of these processes is called lithography or photolithography i.e., the construction of three-dimensional relief images on the substrate for subsequent pattern transition to the substrate.

Process of semiconductor lithography:

1. Lithography

Lithography is used to go under transformational patterns from a photomask to the surface of the wafer. The patterned information is recorded on a layer of photoresist which is applied on the top of the wafer. The photoresist is forced to change its physical properties when it is subjected to light (often ultraviolet) or another source of illumination (e.g., X-ray). The photoresist, which is the main aspect of lithography is either developed by (wet or dry) etching or by converting to volatile compounds through exposure. The pattern defined by the mask is either eliminated or remains after development, depending on if the type of resistance is positive or negative.

2. Etching

Etching is useful for the removal of unwanted material selectively in order to create patterns. This pattern of eliminating materials is known as the etching mask. The parts of the material which will be subjected to further processes should remain and are protected by the mask. The unmasked material can be removed by two methods, 1) wet (chemical) and 2) dry (physical) etching. Wet etching has a very quality strength to become isotropic (it measures the same value when it measures in the different directions) which results in limiting its application, and there will be difficulty in catching the time. On the other side, dry etching, as compared to wet etching, is highly anisotropic but less selective.

3. Deposition

A horde of layers of different materials, having different properties, is made to be deposited during the Integrated Circuit fabrication process. The two most crucial aspects of the deposition phase of lithography are the deposition methods 1) physical vapour deposition (PVD) and 2) chemical vapour deposition (CVD). During physical vapour deposition, gas ions possessing high kinetic energy sputter particles from a sputter target to create a low-pressure plasma chamber. The methodology of CVD is that a chemical reaction involving both, a gas mixture on the substrate surface at high temperatures. The requirement of staggering rate of temperatures (high temperatures) is the most curtailment factor for applying CVD. This problem can be avoided with the help of plasma enhanced chemical vapour deposition, also known as PECVD, where the chemical reaction is enhanced with radio frequencies instead of high temperatures. A critical aspect and deciding factor for the deposition technique is the non-variability of the deposited material, especially the layer thickness.

4. Chemical Mechanical Planarization

Processes like etching, deposition and oxidation helps in transformation of the topography of the wafer surface resulting into to a non-planar surface. Chemical mechanical planarization which is also known as CMP, is used to plane the wafer surface with the help of chemical slurry. As a part of this process, a planar surface is very crucial for the lithography process to get an accurate and high-quality pattern transfer. Furthermore, CMP permits allowing indirect patterning because the elimination of material always starts on the highest areas of the wafer surface. This implies that at definite lower-lying regions like a trench, the material can be left. Together with the deposition of non-planar layers, it makes CMP an effective method to build up IC structures.

5. Oxidation

Oxidation is an enhancement process or step that is used to transform the silicon material on the wafer into a silicon dioxide substrate. This chemical reaction constituting silicon material and oxygen begins at normal room temperature but halts after a very thin coating of a similar oxide film. For an effective and efficient oxidation rate, the wafer must get suitable or comfortable to a furnace with oxygen or water vapour at higher temperatures. Silicon dioxide layers are well known as a bench mark for insulators or masks for the implantation of ions. The tendency of silicon to form high-quality silicon dioxide on the chip is an important factor that forms the foundational basis of why silicon is still the dominating material in IC fabrication.

6. Ion Implantation

Ion implantation is the most fundamental and profound technique for the induction of dopant impurities into crystalline silicon. This is performed with an electric field that can accelerate the ionized atoms or molecules so that these particles penetrate into the target material until they come to rest and as result of this interaction with the silicon atoms. Ion implantation can control the accurate distribution and dose of the dopants in silicon because the penetration depth depends on the ions’ kinetic energy, which has a linear relationship to the electric field. The dopant dose can be controlled by varying the ion source, but there are also drawbacks to this processing stage.

7. Diffusion

Diffusion is defined as the conventional process which involves the interaction of impure atoms in a semiconductor material at subsequently high temperatures. The driving force, which is caused by the diffusion process, leads to the concentration gradient. There is a huge variability of diffusivities for the various dopant species, which are dependent on how easy the respective dopant impurity can pass through the material. Diffusion is applied to anneal; the crystal defects after the process of ion implantation result in the introduction of the dopant atoms into silicon, forming a chemical vapour source. In the last case, the diffusion time and temperature are the deciding factors in the depth of dopant penetration.

Patent Analysis - "Semiconductor Lithography"

58,485 – Total alive patents in last 10 years in the field of semiconductor lithography

Top 10 Players - "Semiconductor Lithography"

The top 10 semiconductor foundries globally generated more than 24.41 billion dollars in sales in the second quarter of 2021.

With the lion’s share of 6846 patents, TSMC tops the chart as the market leader. It had a market share of just under 53 percent in the global semiconductor foundry industry in the second quarter of 2021, while IBM, which currently outsources its high-volume chip production to Samsung Electronics Co Ltd, had 17.4 percent. ASML was ranked third among its peers, with a market share of between 16 to 16.4 percent in the current year. Following the trails is Canon that stands fourth with a portfolio of 1762 patents. Fujifilm is not too far behind, with 1746 patents to its name. With a market share of somewhere around 6.4 percent, KLA ranks sixth. Global foundries, on the other hand, hold the seventh position. Shin Eats Chemical, Intel and SEL follow, respectively.

Patent Filing Trend (Semiconductor Lithography) Over the last 10 Years

Over the last ten years, the Semiconductor lithography market has grown tremendously and is still dynamic. It is estimated to grow at a CAGR of 4.8% during 2021-2026. In the initial year (2011), there was an exponential growth where the count of patents increased from 3354 to 4961. Then the following five years (2012, 2013, 2014, 2015 and 2016) saw an upward trend, but the growth was slow compared to the earlier growth rate. The sixth year (2017) again saw an appreciable growth trend where the patent numbers increased to 6932. The seventh and eighth years (2018 and 2019) saw a positive change in the numbers but not significant enough. Further, in 2020 there was a decrease in the number of patents - from 7214 to 4833, which indicates a negative trend and a fall in the market. The current year is, however, experiencing a recovery, with the numbers increasing slowly as represented.

Future of lithography

EUV or extreme ultraviolet lithography is a technique or process which uses extreme ultraviolet lithography light having a staggering amount of short-wavelength of 13.5 nm. With the development of EUV lithography, it also maintains the application of Moore’s law. This lithography technique is made to revolutionize or change the dynamics of state-of-the-art semiconductor manufacturing. The semiconductor industry as an entire organization is on the verge of innovating as a whole in the EUV space as it transitions from high-end technology production from 193 nm to EUV. EUV lithography market is expected to grow at a staggering rate from USD 2.98 billion in 2018 to USD 10.31 billion by 2023, at a CAGR of 28.16%.

Why EUV Lithography?

There are varied ranges of next-generation lithography or photolithography techniques: X-ray Lithography, Electron Beam lithography and Nano-imprint lithography, which are at par with EUV Lithography. Whereas, in the case of EUV Lithography technique, which surrounds or prevails over its contemporaries, enhances or boosts the upcoming scaling demand for printing of miniature features. With the help of this technique, companies manufacturing tools have significantly subsided the wavelength, which is extreme UV, for the light used for implementing imaging systems.

Future Challenges Ahead of EUV Lithography

Global Overall EUV Lithography market size was valued at US$ 2.04 B in 2019 and the total revenue is expected to grow at 28.18% through 2021 to 2027, reaching nearly US$ 14.87 Bn.

In Extreme Ultraviolet Lithography, an external output that produces power helps convert plasma into light at 13.5nm wavelengths. The light then bounces off multiple mirrors before hitting the wafer, where it is used to create small features. Despite the benefits of EUV technology, it still confronts a number of problems, such as light source and equipment downtime. The most significant disadvantage or barrier in the route of EUV lithography is the demand for a high-power light source to illuminate photoresists. One of the fundamental and primary reasons for the delay in commercial adoption of EUV lithography has been the inability to build a light source with sufficient power. With 250W radiation power and the ability to generate 450W radiation, ASML is currently the finest shipping equipment when it comes to generating power. The ability to produce such a high-power light source will increase EUV lithography's reliability and dependability. The significant absorption of EUV radiation by all materials is another important stumbling problem in building an acceptable photoresist for EUV lithography, which becomes a roadblock in the technology's success. Extreme UV lithography resists will almost certainly be designed in such a way that printing happens in a very thin imaging layer on the resist's surface. Apart from that, EUV resist materials will have to adapt to the impending advancements in light source technology. In the face of these obstacles, technology has failed to achieve its purpose, and as a result, they have yet to taste commercial success.








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